Tensilica

Tensilica


ConnX D2

Targets: General Purpose

The ConnX D2 DSP engine adds dual 16-bit MAC units and a 40-bit register file to the base RISC architecture of the Xtensa LX3 processor. It utilizes 2-way SIMD instructions to provide high performance on vectorizable C code. It also delivers dual-MAC performance using 64-bit VLIW instructions for code that cannot be vectorized.

The ConnX D2 DSP was built to maximize 16-bit fixed-point performance on compiled C code without the need for assembly code optimization.