PowerPC 440

Targets: Communication & Wired, Imaging & Video, Military & Aerospace

Xilinx PowerPC 440 Block Diagram

The PowerPC 440 is incorporated in the Virtex-5 FXT FPGA family with a sophisticated CPU, APU controller, and high-bandwidth crossbar switch. The crossbar switch enables high-throughput 128-bit interfaces and point-to-point connectivity. Integrated DMA channels, dedicated memory interface, and on-chip bus interfaces minimize logic utilization, reduce system latency, and optimize performance. Simultaneous I/O and memory access maximizes data transfer rates.

The IBM PowerPC 440 core is a hard 32-bit RISC CPU core immersed directly into the Xilinx FPGA fabric to support and implement a variety of high-performance embedded applications, such as wired communications, imaging/video and military/aerospace applications. The combination of dual hard PowerPC core systems integrated with co-processing capability enables a range of performance optimization options and application customization. PowerPC processors in Xilinx Virtex FPGAs can be integrated with peripherals like Gigabit Ethernet, PCI express, UART16550, SPI, I²C, GPIO, and memory controllers including DDR2, DDR3, DDR, SDRAM, SRAM and Flash memories.

The Virtex family Platform FPGAs with immersed PowerPC 405 blocks are supported by the XPS (Xilinx Platform Studio) embedded tool suite bundled with a processor IP (intellectual property) library in the Xilinx EDK (Embedded Development Kit). Integrated hardware and software development kits include pre-verified reference designs and JTAG probes/cables to kick-start the design process from a known working platform. A comprehensive library of applications notes and reference designs support PowerPC development. An ecosystem of software tools and RTOS providers support the PowerPC processor embedded in Virtex FPGAs.