[Editor's Note: This was originally posted in the Embedded Master]
In the previous post in this series I asked whether reporting uA/MHz is an appropriate way to characterize the energy profile of a processor. In this post, I assume uA/Mhz is appropriate for you and offer some suggestions of additional information you might want processor vendors to include with this benchmark when they use it. I will explore how uA/MHz is insufficient for many comparisons in the follow-on post in this series.
One problem with reporting a processor’s power draw as uA/MHz is that this value is not constant across the entire operating range of the processor. Consider the chart for the Texas Instruments MSP430F5438A operating at 3V, from 256-kbyte Flash, and with an integrated LDO. This processor has an operating range up to 25MHz, and the value of uA/MIPS ranges from 230 to 356 uA/MIPS across the full operating range. Additionally, the energy sweet spot for this device is at 8MHz. Using the part at higher (and lower) clock rates consumes more energy per additional unit of processing performance.
Adrian Valenzuela, TI MSP430 MCU Product Marketing Engineer at Texas Instruments shares that many designers using this part operate it at its energy sweet spot of 8MHz precisely because it is most energy efficient at that clock rate rather than at its highest operating speed.
The chart for Microchip’s PIC16LF1823 device illustrates another way to visualize the energy sweet spot for a processor. In this example, the energy sweet spot is at the “knee” in the curve, which is at approximately 16 MHz – again short of the device’s maximum operating clock rate of 32 MHz.
At a minimum, if a processor vendor is going to specify a uA/MHz (or MIPS) metric, they should also specify the operating frequency of the device to realize that energy efficiency sweet spot. To provide a sense of the processor’s energy efficiency across the full operating range, the processor vendor could include the uA/MHz metric at the device’s highest operating frequency – the implied assumption is that the energy efficiency varies with clock rate in some proportion between these two operating points.
Using a single-value uA/MHz as an energy metric is further complicated when you consider usage profiles that include waking-up from standby or low power modes. In the next post in this series I will explore the challenges of comparing energy efficiency between different processors when the benchmarking parameters differ, such as what kind of software is executing, what is the compiler and memory efficiency, and what peripherals are active?
Tags: Low Power
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