[Editor's Note: This was originally posted at the Embedded Master] 

For the next few energy harvesting posts, I would like to explore the various approaches for extracting, storing, and using energy from the environment. However, this could take several posts to cover all of this, so I am focusing this post on pointing out various energy harvesting resources for those of you with a need for more information sooner. Let me clarify, by energy harvesting applications, I mean building systems that can extract enough trace amounts of energy from the environment to power their own operation potentially indefinitely. This is in contrast to those efforts to harvesting energy from non-fossil fuel sources as an alternative energy source.

The Energy Harvest Forum is a general site that lists a fair number of companies that claim to be involved in energy harvesting for WSN (Wireless Sensor Network) and control systems. One concern I have about the company links is that they all go to the home page for each company and it is not always obvious how to get to the energy harvesting material at each company’s site. The site lists companies offering piezo, thermal, and photo electric products.

Texas Instruments has an energy harvesting resource at their site that includes information about their parts and development kits that support energy harvesting. The site also includes application notes, whitepapers, videos, and links to articles. Much of the material is company specific, but there is some general information there. At this point, it is one of the few such collections of energy harvesting material available in one place.

In researching this topic, I heard the name of a few companies mentioned by more than one source.  I will try to get more information about each of them, as well as other companies, in follow-up posts. I’m mentioning these companies here because they appear to be active based on mentions from multiple companies that either have or will have energy harvesting resources available later this year. Cymbet’s EnerChip devices provide power storage solutions for applications such as power bridging, permanent power, and wireless sensors. Infinite power Solutions is involved with solid-state, rechargeable thin-film micro-energy storage devices. Powercast is different from the previous two companies in that they focus on delivering micro-power wirelessly via RF energy harvesting.

Micro-energy harvesting seems to be on the cusp of delivering a different way to think about energy for embedded designs. The opportunities for harvesting the trace amounts of energy that is resident in the environment are becoming more compelling as the cost, complexity, and reliability for the energy harvesting approaches continue to evolve toward parity with batteries.

[Editor's Note: This was originally posted on the Embedded Master] 

The lower limit of power consumption of embedded processors continues to drop; however, there is a point where parts that operate with even smaller amounts of energy is equivalent to operating on no power. Today’s lowest power parts, such as the ones I discussed in earlier posts in this low power series, are at the edge of this point because designers are beginning to be able to pair them with energy harvesters that are able to pull more energy from the ambient environment than the application needs to operate for an indefinite period of time.

The practical limit for low power operation as “no power operation” will be at that point where harvesting the ambient energy is sufficient to allow a system to operate continuously. There are currently no systems that operate at this lower limit yet. Additional energy efficiency after this point becomes an opportunity to add more processing features to the system, analogous to how higher clock frequencies and parallel computing engines enable today’s high-end systems to take on more capabilities.

Energy harvesting is a process that enables a system to capture, store, and operate off of the ambient energy from the surrounding environment. Ambient energy can be harvested in many forms; the most commonly tapped forms at this time are thermal, light, vibration, and RF (radio frequency). I will explore the companies providing methods for harvesting these types of energy in later posts. Essentially, these types of systems harvest “free energy” from sources that we currently are not able to tap for any other work.

Currently, batteries are able to provide a reliable and cost effective source for low power systems, and they usually enjoy a cost advantage over the various energy harvesting methods. Despite this cost advantage, there are usage scenarios, namely those cases where changing batteries are impractical, costly, dangerous, or even impossible, that make using an energy harvester a more practical approach. Examples scenarios include implantable medical devices; surveillance and security equipment, as well as buildings and structures with smart sensors distributed throughout them.

The first requirement of energy harvesting systems is that they must be able to extract more energy from the environment than the amount of energy the collection and storage components consume. Storage options include batteries, capacitors, and thin-film technologies. Follow-up posts in this series will explore the cost and efficiency challenges facing the types of transducers available to extract the ambient energy as well as the challenges facing the energy storage technologies.

The second requirement of energy harvesting systems is that they must be able to monitor their own energy storage and adjust their operation to avoid starving their energy storage so that the energy collection components can still operate when there is energy available to harvest. Designers of these types of system need to be able to view energy as a variable resource and design their systems to scale with the inevitable fluctuations of energy availability so that the system can remain operational despite periods of “starvation.”

 [Editor's Note: This was originally posted on the Embedded Master] 

Low power operation continues to grow in importance as a product differentiator. One of the most visible examples of the importance of low power operation is chronicled in the success of the Nintendo Gameboy which debuted in 1989. It was not the most technically advanced product of its type. It did not have the best graphics. It did not deliver the fastest performance. It did however deliver the most important thing significantly better than all of the other competing hand-held game devices at the time – it delivered the longest play time on a set of AA batteries. That differentiator enabled the Gameboy to not only outlive every other single competing device, but it has led to a long line of successive devices that enjoy large volumes in sales.

The Energy Micro offering, called the energyAware Profiler, interfaces via USB with the company’s EFM32 Gecko development and starter kits, and it is available now as a download. The Hitex offering, called PowerScale, measures up to four different power domains in the power supply line of each domain. The tool can track current measurements from 200nA to 1A, and it is not limited to a single type of microprocessor. The IAR Systems offering is part of the Embedded WorkBench, and it is currently in beta. It samples the power supply for board because the main component of the system power consumption is the peripherals rather than the microcontroller itself.

Several companies, including Energy Micro, Hitex Development Tools, and IAR Systems, are offering, or have announced products that are planned for production support within this year, that enable developers to match energy consumption with specific lines of code in their software. These tools measure the system power consumption and enable developers to make software and system level trade-offs during the software development process. They can help with identifying when peripherals are not being actively used by the system and are powered on – burning precious energy for no useful work. The interfaces of these tools present the energy data graphically so that it is easier for a developer to spot the points of interest.

These are just three recently announced software development tools offering visibility into the dynamic energy consumption of embedded systems under operating conditions. I believe there will be more such tools announced over the next year or so as low power operation takes on even more of the design mind space. I expect that there will also be good and complementary tutorial and tips and tricks material to help developers make the most of these tools in the years to come. I will highlight these resources and how they are changing the way designers are doing low power design as they become public. If you know of similar resources that I missed, please point them out here or email me at Embedded Insights.

[Editor's Note: This was originally posted on the Embedded Master] 

The low power thresholds for processor devices continue to drive downward, but what does it take to drive those energy thresholds ever lower? In many cases, it is possible to reduce a processor’s active current draw by migrating to a more aggressive silicon node, but this comes at the cost of standby power or leakage current. To balance between lower active and standby power, processors rely on low leakage silicon variants and optimally sized transistors within each block of the architecture.

Øyvind Janbu, CTO at Energy Micro, points out that designing circuits that are going to be enabled 100% of the time, such as power supervision circuits with brown-out and power-on-reset functions, is challenging to design to an energy budget of a few nA of current. As with all parts of the processor, chip architects trade-off between speed, energy draw, and accuracy at each resource block to best meet the needs of the specific function and the overall system requirements. He believes that because flash memory is power hungry and slow, in time, it will be replaced by other non-volatile technologies in many cases.

Janbu also feels that some of the challenges when designing for extremely low power chip designs are similar to those faced by RF designers. He believes the accuracy of simulation models of transistors are being pushed outside their intended operating region, and this means that the architects must specify sufficient margins so that the designs still work in volume production. There is a need for more extracted layout simulations because of high impedant nodes due to extremely low currents.

Internal voltage regulators are another low power challenge as microprocessors continue to move into more aggressive silicon nodes. While using internal voltage regulators helps reduce active power consumption, the challenge lies in designing voltage regulators and voltage references that have zero quiescent current, so as to not sacrifice the standby power consumption. The voltage regulator and voltage reference are basically the reason why microprocessors made in 0.18 um or smaller silicon nodes have standby current consumption in the tens of uA range.

The future direction of low power processors may center on modular architectures because driving to extremely low power requirements increasingly requires a rethinking of the fundamental architecture of each module. This rethinking increases the design time and risk of the processor, especially when the architects are exploring and implementing new and unproven approaches. However, as the market finds more uses for low power devices, the increased volumes will provide the needed offsets to incur the longer design cycles and higher risk to push the power threshold even lower.

[Editor's Note: This was originally posted on the Embedded Master] 

In the previous post in this series I pointed out that the “sweet spot” clock rate for active power consumption for some microcontrollers is lower than the maximum operating clock rate for that part. However, looking only at the rated power consumption of these microcontrollers at a steady always-on operating state ignores the fact that many low-power microcontrollers employ on-chip resources that can significantly impact the overall energy consumption of the part as the system transitions through multiple operating scenarios.

For low power applications, designers usually focus on the overall operating system energy draw rather than the peak draw. This focus on overall power efficiency justifies the additional design, build, and testing complexity of using low power and sleep modes when the system does not need to draw on the full processing capacity of the processor. In fact, many low power constrained systems spend the majority of their operating time in some type of sleep mode and transition to full active mode only when needed. This relationship begins to hint at why using only a single uA/MHz benchmark is insufficient to evaluate a processor’s energy performance.

There is a variety of low power modes available to processor architectures. Shutting down just the CPU and leaving all of the other on-chip resources functional is one type of sleep mode. Deeper sleep modes can turn off individual or all peripherals until the only on-chip resource drawing current is for RAM retention. Always-on resources may include a power supervisor circuit with brown-out and power-on-reset functions; these functions must be enabled 100% of the time because the events they are designed to detect cannot be predicted.

So in addition to active power draw, low power designers need to understand the system’s static or leakage current draw when the system is inactive. Another important metric is wake-up-time – the amount of time it takes the system to transition from a low-power mode to the active operating mode because the system clock needs to stabilize. The longer it takes the system clock to stabilize, the more energy is wasted because the system is performing no useful work during that time.

A DMA controller is an on-chip resource that affects a system’s power consumption by offloading the task of moving data from one location to another, say from a peripheral to memory, from the expensive CPU to the much cheaper to operate DMA controller. The following chart from an Atmel whitepaper demonstrates the value of using a DMA controller to offload the CPU, especially as the data rate increases. However, effectively using the DMA can add a level of complexity for the developer because using the DMA controller is not an automated process.

Some microcontrollers, such as from Atmel and Energy Micro, allow developers to configure the DMA controller and peripherals, through some type of peripheral controller, so that they can collect or transmit data autonomously without waking the CPU. On some devices, the autonomous data transfer can even include direct data transfers from one peripheral to another. The following chart from Energy Micro’s technology description demonstrates the type of energy reduction autonomous peripherals can create. The caveat is that the developer needs to create the highly autonomous setup as there are no tools that can perform this task automatically at this time.

On-chip accelerators not only speed up the execution of frequent computations or data transformations, they also do it for less energy than performing those functions with a software engine. Other types of on-chip resources that save energy draw can include ROM-based firmware, such as being adopted by NXP and Texas Instruments on some of their parts. There are countless approaches available to chip architects to minimize energy consumption, but they each involve trade-offs in system speed, current consumption, and accuracy that are appropriate differently to each type of application. This makes it difficult to develop a single benchmark for comparing energy consumption between processors that overlap capabilities but target slightly different application spaces.

[Editor's Note: This was originally posted in the Embedded Master] 

In the previous post in this series I asked whether reporting uA/MHz is an appropriate way to characterize the energy profile of a processor. In this post, I assume uA/Mhz is appropriate for you and offer some suggestions of additional information you might want processor vendors to include with this benchmark when they use it. I will explore how uA/MHz is insufficient for many comparisons in the follow-on post in this series.

One problem with reporting a processor’s power draw as uA/MHz is that this value is not constant across the entire operating range of the processor. Consider the chart for the Texas Instruments MSP430F5438A operating at 3V, from 256-kbyte Flash, and with an integrated LDO. This processor has an operating range up to 25MHz, and the value of uA/MIPS ranges from 230 to 356 uA/MIPS across the full operating range. Additionally, the energy sweet spot for this device is at 8MHz. Using the part at higher (and lower) clock rates consumes more energy per additional unit of processing performance.

Adrian Valenzuela, TI MSP430 MCU Product Marketing Engineer at Texas Instruments shares that many designers using this part operate it at its energy sweet spot of 8MHz precisely because it is most energy efficient at that clock rate rather than at its highest operating speed.

The chart for Microchip’s PIC16LF1823 device illustrates another way to visualize the energy sweet spot for a processor. In this example, the energy sweet spot is at the “knee” in the curve, which is at approximately 16 MHz – again short of the device’s maximum operating clock rate of 32 MHz. 

At a minimum, if a processor vendor is going to specify a uA/MHz (or MIPS) metric, they should also specify the operating frequency of the device to realize that energy efficiency sweet spot. To provide a sense of the processor’s energy efficiency across the full operating range, the processor vendor could include the uA/MHz metric at the device’s highest operating frequency – the implied assumption is that the energy efficiency varies with clock rate in some proportion between these two operating points.

Using a single-value uA/MHz as an energy metric is further complicated when you consider usage profiles that include waking-up from standby or low power modes. In the next post in this series I will explore the challenges of comparing energy efficiency between different processors when the benchmarking parameters differ, such as what kind of software is executing, what is the compiler and memory efficiency, and what peripherals are active?

[Editor's Note: This was originally posted on the Embedded Master] 

In the previous Extreme Processing post about low cost processing options, I touched on what techniques processor vendors are using to drive down the price of their value line devices. However, the focus of these companies is not just on low price, but on delivering the best parts to match the performance, power, and price demands across the entire processing spectrum. Semir Haddad, Marketing Manager of the 32-bit ARM microcontrollers at STMicroelectronics, shares “Our goal ultimately is to have one [processor part] for each use case in the embedded world, from the lowest-cost to the highest-end.”

In addition to extreme low cost parts, there is increasing demand for processors that support longer battery life. Similar to low cost processor announcements, there is a bit of marketing specmanship when releasing a device that drives down the leading edge of the lowest energy usage by a microcontroller. The ARM Cortex-M3 based EFM32 Gecko microcontrollers from EnergyMicro claims a 180 μA/MHz active mode power consumption. Texas Instruments’ 16-bit ultra-low power line of MSP430 microcontrollers claims a 165 μA/MIPs active mode power consumption. Microchip’s new 8-bit PIC1xF182x microcontrollers claim a less than 50 μA/MHz active current consumption.

There are many ways to explore and compare low power measurements, and there have been a number of exchanges between the companies including white papers and YouTube videos. We can explore some of these claims over the next few posts and discussions, but for this post, I would like to focus on whether the use of μA/MHz benchmark is appropriate or if there is a better way for low power processor vendors to communicate their power consumption to you. In the case of the Texas Instruments part, 1 MHz = 1 MIPS when there is no CPU clock divider.

If the μA/MHz benchmark for active operation is appropriate for you, is there any additional information you need disclosed with the benchmark so that you can make an educated judgment and comparison between similar and competing parts? The goal here is to help suppliers communicate the information you to more quickly make decisions. I have a list of characteristics I think you might need along with the benchmark value, and I will share it with you in the next post after you have a chance to discuss it here.

If the μA/MHz benchmark is not appropriate for you, what would be a better way to communicate a device’s relevant power consumption scenarios? I suspect the μA/MHz benchmark is popular in the same way that MIPS benchmarks are popular – because they are a single, simple number that is easy to measure and compare. The goal here is to highlight how to get the information you most need more quickly, easily, and consistently. I have some charts and tables to share with you in the follow-on post.