Actel Core8051(S)

Targets: Automotive, Communication & Wired, Consumer, General Purpose, Industrial, Medical, Military & Aerospace, Mobile & Wireless, Security, Other

Actel Core8051(S) Block Diagram

Actel's Core8051 and Core8051s microcontroller IP (intellectual property) cores can be used with any of Actel's nonvolatile, single-chip FPGAs including: Fusion, ProASIC3, ProASIC Plus, ProASIC3L, Axcelerator, SX-A and RTSX-S, RTAX-S/SL. Both cores execute all ASM51 instructions and execute most of them in a single clock cycle. Core8051 features a number of fixed peripheral functions including: two timers, a programmable serial port, 13 four-priority-level interrupts, and 32 I/O ports. Core8051s implements the 8051 architecture with all of the peripheral functions removed and an APB (Advanced Peripheral Bus) interface added to the SFR interface. This allows designers to connect any APB peripheral IP function and configure the core to meet their application needs.

Actel has a number of kits that designers can use to develop and prototype designs for Core8051 and Core8051s. These include the System Manager board or Fusion Starter Kit for Fusion devices, the CoreMP7 board for ProASIC3/E devices, the Platform8051 Development Kit for ProASICPLUS, and the Axcelerator Starter Kit for Axcelerator devices.