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E2V
Target Applications
E2V
PC6xx
Targets: Computers & Peripherals, Industrial, Military & Aerospace, Motor Control
The PID7t-603e implementation of the PowerPC 603e (renamed after the 603R) is a low-power implementation of the RISC microprocessor PowerPC family. The 603R implements 32-bit effective addresses, integer data types of 8, 16 and 32 bits, and floating-point data types of 32 and 64 bits. The 603R is a low-power 2.5/3.3V design and provides four software controllable power-saving modes. The 603R provides independent on-chip, 16-kbyte, four-way set-associative, physically addressed caches for instructions and data, as well as on-chip instructions, and data MMUs. The MMUs contain 64-entry, two-way set-associative, data and instruction translation look aside buffers that provide support for demand-paged virtual memory address translation and variable-sized block translation. The 603R has a selectable 32- or 64-bit data bus and a 32-bit address bus.