EnSilica

EnSilica


eSi-1600

Targets: Consumer, Digital Power, General Purpose, Industrial, Motor Control, Security

EnSilica eSi-1600 Block Diagram

The eSi-1600 16-bit CPU is the smallest member in the eSi-RISC family of processor cores from EnSilica. The core employs a 5-stage pipeline and static branch prediction. The eSi-1600's instruction set includes arithmetic and logical instructions (including barrel-shift, multiply and divide), comparisons, load and stores, branches and calls as well as system level instructions to control interrupts and enter lower power states. There are optional instructions and addressing modes available, and developers can add their own user-defined instructions and registers. The eSi-1600 occupies 8.5k gates in its basic configuration. Hardware debug facilities include hardware breakpoints, watchpoints, null pointer detection and single-stepping for debugging of ROM, FLASH and RAM based programs.