Texas Instruments

Texas Instruments


LM3S6000

Targets: Consumer, General Purpose, Industrial, Medical, Motor Control, Security, Test & Measurement, Other

Texas Instruments LM3S6000 Block Diagram

TI's LM3S6000 Series of Stellaris ARM Cortex-M3 microcontrollers feature combinations of industrial connectivity, expanded motion control I/O, larger on-chip memory, and low-power optimization targeting battery-backed applications such as motion control, medical instrumentation, HVAC and building control, factory automation, transportation, remote monitoring, electronic point-of-sale machines, network appliances and switches, and gaming equipment. The LM3S6000 series features fully-integrated 10/100 Mbps Ethernet Media Access Control (MAC) and Physical (PHY) layers.

The TI Stellaris family of microcontrollers are based on the ARM Cortex-M3 v7-M processor; the microcontroller member of the ARM Cortex processor family. The Stellaris family provides entry into the ARM ecosystem. At the heart of the Cortex-M3 processor is an advanced 3-stage pipeline core, based on the Harvard architecture, incorporating features such as branch speculation, single cycle multiply and hardware divide.

Cortex-M3 implements the Thumb-2 instruction set architecture, helping it to be 70 percent more efficient per MHz than an ARM7TDMI-S processor executing Thumb instructions, and 35 percent more efficient than the ARM7TDMI-S processor executing ARM instructions, for the Dhrystone benchmark. Cortex-M3 uses a simplified stack-based programmer's model that maintains compatibility with traditional ARM architecture but is analogous to systems employed by legacy 8- and 16-bit architectures.

The LM3S6000 Series of Stellaris ARM Cortex-M3 microcontrollers feature up to 256-kbytes of single-cycle industrial-grade flash memory, coupled with up to 64-kbytes of onboard single-cycle SRAM. Single-cycle memory means that the read/write memory speed is the same as the Stellaris microcontroller core frequency; up to 50MHz. Each member of the LM3S6000 features a fully integrated 10/100 Ethernet. Stellaris Ethernet-enabled devices combine both the Media Access Control (MAC) and Physical (PHY) layers. In addition, the devices feature up to three UARTs, two I²Cs, and up to two SSI/SSP interfaces.

LM3S6000 microcontrollers feature IP (intellectual property) targeting meticulous motion control including up to six full PWM outputs with a dead-band generator providing shoot-through protection, fault-condition handling in hardware providing quick, low-latency shutdown, synchronization of timers enabling precise alignment of all edges, and hardware quadrature encoders enabling precise positioning sensing.

LM3S6000 microcontrollers feature analog capability, including up to 8 channels of ADC operating at up to 1 MSPS, up to 3 analog comparators, and an onboard temperature sensor. Each ADC channel features a sequencer to minimize CPU utilization, ensuring that the CPU is used for data processing - not data collection. Every Stellaris device offers an onboard LDO voltage regulator to provide the correct input voltages to power the device from a 3.3V source.

The Stellaris LM3S6965 Evaluation Kit provides a compact evaluation platform for the LM3S6000 Series of Ethernet-enabled Stellaris ARM Cortex-M3-based microcontrollers. The board has an In-Circuit Debug Interface (ICDI) that provides hardware debugging functionality not only for the on-board Stellaris devices, but also for any Stellaris microcontroller-based target board. The kit features two complete embedded web server example applications utilizing the open source lwip and uip Ethernet protocol stacks, and many examples from vendors of RTOSes and commercial Ethernet stacks are available for download. The evaluation kits contain all cables, software, and documentation needed to develop and run applications for Stellaris microcontrollers.