Targets: Audio, Automotive, Communication & Wired, Computers & Peripherals, General Purpose, Imaging & Video, Industrial, Military & Aerospace, Motor Control

Cast C68000-AHB Block Diagram

The C68000-AHB implements a 32-bit microprocessor derived from the Motorola MC68000 microprocessor. The core uses an AMBA-compatible AHB master interface, making it a suitable processor for low-cost, AHB-based System on Chip (SoC) applications.

The C68000 works with 8-, 16-, or 32-bit data. It has a 16-bit, two-level instruction decoder, three-level instruction queue, and handles 55 instructions and 14 address modes. It offers users eight 32-bit data and instruction registers, plus a 16-bit status register. It includes an AMBA AHB Master 32-bit memory interface, a seven-level interrupt controller, and an 8-, 16-, or 32-bit arithmetic operations.

Sample ASIC implementation results show the core uses about 24,000 gates and runs at 150 MHz.

The C68000-AHB is a microcode-free design developed for reuse in ASIC and FPGA implementations. The design is strictly synchronous without internal tri-states and with a synchronous reset. Scan insertion is straightforward. Native on-chip debugging is available as an option to facilitate embedded processor debugging.