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Cast R8051XC2 Block Diagram

The flagship R8051XC is a configurable core that can implement a variety of 8051-compatible processors that execute the MCS 51 instruction set. Its fast operation, flexible features and peripherals support, efficient implementation, and on-chip debugging make it suitable for a range of applications.

The core runs with a single clock per machine cycle, and requires an average of 2.12 machine cycles per instruction. Dhrystone 2.1 tests show it to run from 9.4 to 12.1 times faster than the original 8051 at the same frequency. Representative 90 nm ASIC results have reached 450 MHz, for an effective speed-up of 400 times over 80C51 chips.

A flexible set of features and peripherals enable designers to match the core with their specific application and hardware requirements. These options include hardware interrupts, interfaces for serial communication, I²C and SPI interfaces, a timer system with compare- and capture-reload resources, I/O ports, a power management unit, a multiplication-division unit, and a watchdog timer. Integrated on-chip debugging is also available, using a native on-chip debug system called EASE.

The core's compact size and availability in HDL source or optimized netlists make it suitable for use with ASICs or FPGAs. Representative 90 nm ASIC implementation results for different configurations range from under 8,000 gates and a speed of 450 MHz for just the processor to under 71,000 gates and 279 MHz for all the available options (except debug). Designers can choose from various pre-configured versions, such as 80515-like, or license the fully-configurable core.

The R8051XC represents the third generation of CAST 8051-compatible cores, which have been silicon-proven in hundreds of customer products. Numerous tools, tutorials, and other resources for programming 8051s are available for use with the R8051XC; the company has relationships with and has exercised the core with the programming tools from Keil Software.