MIPS Technologies

MIPS Technologies


Targets: Communication & Wired, Consumer, Imaging & Video, Industrial, Mobile & Wireless

MIPS Technologies 24K Block Diagram

Low-power, high-performance MIPS32 24K cores target applications such as digital and interactive television, set-top boxes, Blu-ray DVD, broadband CPE, GPS, and portable audio and video. The 24K family is designed to power through graphics, Java, and demanding code with features like an ultrafast multiply/divide unit (MDU), intelligent caches, a high-performance floating-point unit and the CorExtend capability—which allows developers to accelerate application performance by defining and adding their own instructions.

With an 8-stage pipeline and a maximum worst case clock frequency exceeding 800MHz in 65nm, the 24K family of cores give SoC designers the performance headroom to implement more features now and upgrades in the future with software flexibility rather than rigid, fixed hardware. Cadence, Synopsys, Magma, and other EDA companies help minimize design time and offer a proven path to silicon by co-developing tailored SoC design methodologies. This couples the high-performance, low-power 24K cores with cutting-edge core hardening technologies.

By supporting industry standard bus interfaces such as AMBA 1/2/3 and OCP 2.1, the 24K cores enable easier reuse of standard SoC IP. Memory controllers, bus interconnects, and other peripherals are integrated through common on-chip interfaces. The 24K microarchitecture implements the MIPS32 Release 2 architecture, which includes features such as enhanced bit-field manipulation, reduced interrupt latency and enhanced cache control. Third-party tools and software support the 24K family of cores.