Freescale Semiconductor

Freescale Semiconductor


Targets: Communication & Wired

Freescale Semiconductor MPC8360E Block Diagram

The MPC8360E PowerQUICC II Pro Processor family targets wired and wireless communications applications, such as small to medium enterprise routers and switches, enterprise IADs, IP-PBX, telecommunications switching and transmission equipment, wireless infrastructure, multi-service access platforms, media gateways, SONET controller, multi-tenant units, IP-DSLAMs and industrial/general-purpose networking equipment. The MPC8360E processor is a highly integrated, communications processor that contains an e300 core built on Power Architecture technology. It includes QUICC Engine technology extension of the CPM for enhanced protocol processing.

Based on a dual RISC architecture scaling up to 500MHz, QUICC Engine technology enhances the communications processing capability with Layer 2 termination support of up to Dual Gigabit Ethernet, multiple 10/100 Ethernet, up to two UTOPIA/POS interfaces for OC12-ATM, up to 8 TDMs for 8 T1/E1 or 2 T3/E3 connections, IMA, ML/MC-PPP, HDLC, transparent and other legacy protocols. Full/Low Speed USB and SPI are also supported. In addition to Layer 2 termination support, QUICC Engine technology can support protocol interworking, such as ATM to Ethernet, Ethernet to Ethernet, and ML/MC-PPP to Ethernet. IP (internet protocol) packet classification and transformation, as well as quality of service (QoS) for Ethernet/IP and ATM traffic management are also supported.

By offering both an e300 CPU core and QUICC Engine technology, the MPC8360E is suitable for applications that require a combination of control plane and data plane processing capabilities. Other key features include a 32/64-bit DDR memory controller, a 32-bit PCI controller, local bus, DUART, Dual I²C and integrated security engine. The MPC8360E family supports CPU speeds up to 533 MHz and QUICC Engine technology speeds up to 400 MHz, DDR1 and DDR2 memory, and extended temperature (-40C ambient to 105C junction) This version supports the IEEE 1588 Precision Clock Synchronization standard to synchronize real-time clocks in a distributed system.

PowerQUICC II Pro communication processors are supported by CodeWarrior development tools from Freescale and by an ecosystem of development tools, operating systems, and applications from third-party vendors. The MPC8360EA-MDS-PB Modular Development System processor evaluation board and the MPC8360E-RDK industrial protocol development system are available for the MPC8360E family. The Open QUICC Engine technology third party developer program is designed to enable customers to customize or enhance standard Freescale communication protocols, add a proprietary function or protocol, and reduce BOM cost by integrating the functionality of ASICS or FPGAs through microcode customization services.