Freescale Semiconductor

Freescale Semiconductor


Targets: Communication & Wired

Freescale Semiconductor MPC8572 Block Diagram

Freescale's PowerQUICC III integrated communications processors support symmetrical and asymmetrical multi-core systems. Based on the e500 SoC (System-on-Chip) platform built on Power Architecture technology, they deliver dual-core gigahertz-plus communications processing performance with advanced content processing and security features. The device targets networking and telecom control plane, central processing resources, mixed control-data plane, and networking equipment requiring content aware processing.

The MPC8572 family of processors supports clock speeds from 1.2 GHz up to 1.5 GHz, combining two processor cores, enhanced peripherals, and high-speed interconnects. These processors contain an application acceleration block that integrates four engines: a table lookup unit (TLU) that offloads complex table searches and header inspections; a pattern-matching engine to handle regular expression matching; a deflate engine to manage file decompression; and a security engine that accelerates crypto operations in IPSec and SSL/TLS for virtual private networks.

Support for high-speed interfaces on the MPC8572 enables scalable connectivity to network processors and/or ASICs in the data plane while the MPC8572 platform handles complex, computationally demanding control plane processing tasks. These processors also include a double data rate (DDR2/DDR3) memory controller, enhanced Gigabit Ethernet support, double precision floating point and an integrated security engine that features updated Advanced Encryption Standard (AES) functionality.

PowerQUICC III processors are supported by CodeWarrior development tools from Freescale and by an ecosystem of development tools, operating systems, and applications from third-party vendors. The part is supported by an evaluation board, the PPCEVAL-DS-8572B, and the MPC8572DS development system, as well as simulation software from Virtutech.