Freescale Semiconductor

Freescale Semiconductor

QorIQ P4080

Targets: Communication & Wired

Freescale Semiconductor QorIQ P4080 Block Diagram

The signature member of Freescale's new QorIQ product line, the P4080 multicore processor provides concurrent handling of control-plane, data-plane, and application layer processing tasks. It targets applications such as switches, enterprise and service provider routers, access and media gateways, base station controllers, radio network controllers (RNCs), and general-purpose embedded computing systems in the networking, telecom, industrial, military, and aerospace markets.

The P4080 is based on 45-nm process technology. It integrates enhanced Power Architecture cores, a tri-level cache hierarchy, innovative CoreNet on-chip fabric and datapath acceleration to deliver performance within a 30W maximum power envelope.

The P4080 SoC features eight enhanced Power Architecture e500mc cores that target a top frequency of 1.5 GHz. Each core has its own dedicated 128-kbyte L2 backside cache and access to 2-Mbyte of shared front side L3 cache. The device supports full processor independence, including the ability to boot and reset each individual e500mc core. The cores can work as eight symmetric multiprocessing (SMP) cores, as eight completely asymmetric multiprocessing (AMP) cores, or they can be operated with varying degrees of independence with a combination of SMP and AMP groupings.

Overall performance is enhanced via a Datapath Acceleration Architecture (DPAA) that simultaneously provides high networking performance and reduces software complexity. The acceleration architecture works in concert with the cores to manage packet routing, security, quality-of-service and deep packet inspection – freeing the cores to focus on value-added services and application processing. The CoreNet fabric also boosts performance by eliminating bus contention, bottlenecks and latency issues associated with shared bus/shared memory architectures.

The QorIQ P4080 features an array of high-speed I/O technologies including dual 10-Gbps Ethernet (XAUI) controllers, eight 1-Gbps Ethernet (SGMII) controllers, three PCI Express v2.0 controllers/ports running at up to 5GHz and two serial RapidIO 1.2 controllers/ports running at up to 3.125GHz.

To speed application development and enable new levels of visibility into the multicore device, Freescale has partnered with simulation software firm Virtutech to create a hybrid simulation environment. This environment combines Virtutech's Simics simulator's featuring a fast-functional mode with a detailed performance mode for the QorIQ P4080 processor platform. Prior to first silicon, developers have a simulation environment where everything is deterministic, everything can be seen, and everything can be controlled – all without real-world hardware constraints. Using the hybrid model, developers may partition cores and code, performing 'what if' scenarios. They may deploy and bring up operating systems, as well as develop, debug, and test software. The environment also allows software developers to performance tune their drivers, middleware, and application code.

In addition, Freescale has engineered capabilities into the QorIQ P4080 to enable advanced debugging while working in tandem with ecosystem partners to assure availability of tools that can take advantage of these features. These capabilities include Aurora-based high speed trace, Nexus trace, integrated instruction trace, watchpoint triggers, cross-event triggers, performance monitoring, and other debug features as defined by the Power ISA. The features enable dynamic debug to maximize visibility into complex interactions that may occur among tasks running on different cores.